At the 2025 RISC-V Summit NVIDIA’s Vice President of Hardware Engineering Frans Sijsterman spoke in China and said that in the future, the company’s GPUs will cooperate with processors based on open ...

OrangePi RV2 uses RISC-V CPU architecture, an alternative to x86 and ARM. RV2 offers 8-core Ky X1 RISC-V AI CPU, with 2TOPS for AI tasks. It also has two M.2 slots, a microSD slot, Wi-Fi ...

RISC-V is an open standard and architecture maintained by RISC-V International. Qualcomm began making Snapdragon platforms for wearables in 2016, and to date all of them have used ARM 's ...

SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr ...

Silicon Valley's Wave Computing said on Tuesday it is launching designs for two new microprocessors this year using RISC-V architecture as it sunsets its once-popular MIPS architecture.

Lars Bergstrom, Android's director of engineering, wants RISC-V to be seen as a "tier-1 platform" in Android, which would put it on par with Arm. That's a big change from just six months ago.

The collaboration between LDRA and Microchip expands functional safety and security support for Microchip’s RISC-V ® architecture with important new tools and capabilities that simplify and ...

RISC-V is, like x86 and ARM, an instruction set architecture (ISA). Unlike x86 and ARM, it is a free and open standard that anyone can use without getting locked into someone else's processor ...

In this work, we present a modified version of the OoO C910 core to achieve full RISC-V standard compliance in its debug, interrupt, and memory interfaces. We also introduce CVA6S+, an enhanced ...

The biggest news recently is that Google wants to make RISC-V a tier-one architecture for Android. 2D Android apps are written in Java and compiled for your processor (sometimes in the cloud!), so ...