Renesas’ new R9A02G020 motor control ASSP is based on RISC-V processing IP from Andes Technology Corp. Franklin Lin, CEO of Andes, said, “We are thrilled to have Andes' entry-level RISC-V ...

Renesas’ motor-control ASSP is based around a 32-bit, Andes N22 RISC-V core with the typical set of peripherals including a 12-bit ADC and two 8-bit DACs.

Renesas’ new R9A06G150 voice-control HMI ASSP is based on RISC-V processing IP from Andes Technology Corp., which incorporated its AndesCore D25F CPU core based on the AndeStar™ V5 architecture.