MIPS (Mountain View, Calif.) has made major changes to the synthesizable HDL code for a new version of its 32-bit processor core to reduce power consumption and code density. At the same time, the ...

SAN JOSE, Calif. — MIPS Technologies Inc. has introduced a multiprocessing core optimized for network applications where cacheless interfaces to external SRAMs are preferred. The M4K core is the first ...

MANHASSET, N.Y. MIPS Technologies and Sarnoff Corp. today announced that Sarnoff will offer its latest H.264 codecs on the industry-standard MIPS architecture.The offering enables MIPS Technologies ...